UMC 0.35 µm Process
   
 
UMC 0.35µm HV (CDMOS for power management IC) Process
 

UMC L350 Library

   
UMC L350 HV (CDMOS for power management IC) Process Features
  FS80U_A_GENERIC_CORE
 
 
  • 3.3 V operating voltage
  • UMC 0.35 μm HV (CDMOS for power management IC) Process
  • Raw gate density: 22.5k gates/mm2
  • Wide drive strength range and optimized P/N ratio for high performance
  • A complete set of models for industry-standard EDA tools
  • High density and high porosity
  • 3.3 V ±10% characterization range
  • Supports 3-corner timing model
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